We are looking for a ASIC RTL Design Engineer to join our team
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 2 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
- Experience in logic design, functional, and Power, Performance and Area (PPA) closure.
Preferred qualifications:
- Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 7 years of experience in ASIC design and in one or more successful ASIC products from concept to silicon.
- Experience applying engineering best practices (e.g., code review, testing, refactoring).
- Experience applying computer architecture principles to solve open-ended problems.
- Knowledge of computer networks and machine learning.
- Understanding of computer architecture/memory subsystem architecture.
Responsibilities
- Define micro-architecture specifications and take ownership of one or more modules and implement Register-Transfer Level (RTL).
- Create simple test benches and debug complex logic simulation.
- Converge functionality and Power, Performance and Area (PPA) of the design.
- Work closely with software teams to ensure solutions. Contribute to design methodology, libraries and code review.
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