We are looking for aASIC Design Engineer to join our team
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
Preferred qualifications:
- Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
- Experience working with architecture, design, and implementation of digital logic using Chisel.
- Knowledge of accelerators (e.g., Machine Learning or GPUs) or similar high performance designs.
Responsibilities
- Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications.
- Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems.
- Engage with Verification and Silicon Validation teams to ensure functionality of the design.
- Provide input on synthesis, timing closure, and Physical Design of digital blocks.
- Take a leadership role on technical project teams and set technical direction.
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